---
title: "1.5 TB on Your Desk: Why the M7 Ultra Mac Studio Beats the Cloud"
description: "The M7 Ultra Mac Studio projects to 1.5 TB of unified memory and 1.9 to 2.5 TB/s of bandwidth. The LPDDR6, bus width and 2nm math behind it."
date: 2026-11-03
author: "Ben Racicot"
tags: ["Apple Silicon", "Local AI", "Mac Studio", "Memory Bandwidth", "LPDDR6", "macOS"]
type: "paper"
canonical: "https://modelpiper.com/blog/m7-ultra-mac-studio-memory-bandwidth"
---

# 1.5 TB on Your Desk: Why the M7 Ultra Mac Studio Beats the Cloud

> The M7 Ultra Mac Studio projects to 1.5 TB of unified memory and 1.9 to 2.5 TB/s of bandwidth. The LPDDR6, bus width and 2nm math behind it.

## TL;DR

We project the M7 Ultra Mac Studio, reported for 2028, at up to 1.5 TB of unified memory, 1.9 to 2.5 TB/s of memory bandwidth and 96 to 128 GPU cores. Apple has announced none of it. That machine would hold Alibaba's 2.4-trillion-parameter open flagship at 4-bit, which no single Mac can do today.

Local AI spent years blocked by hardware, not software. A language model has to sit in fast memory, and every token it generates means reading its active weights again. Consumer machines had neither the room nor the speed. The base M1 topped out at 16 GB and 68 GB/s.

Two things changed, on separate curves. Stanford and Together AI's [Intelligence per Watt](https://arxiv.org/abs/2511.07885) study found local AI's efficiency rose 5.3x from 2023 to 2025, 3.1x from better models and 1.7x from better hardware. Over the same years, the share of real queries a single local model answered as well as a frontier model went from 23.2% to 71.3%.

You can see both curves on a desk. Qwen3.8 27B, released in August 2026 under Apache 2.0, is about 19 GB in the Q4 build we run. The first Apple Silicon Macs with enough memory for it shipped in October 2021, the M1 Pro and M1 Max at 32 GB and up. We run it on a 64 GB M1 Max in our lab and a 32 GB M2 Max every day.

So the wall moved up. [Qwen3.8 2.4T A95B](https://developer.nvidia.com/blog/serve-qwen3-8-2-4t-a95b-a-2-4t-parameter-model-with-configurable-reasoning-on-nvidia-gb300-nvl72/), the open release of Alibaba's Max-tier flagship, has 2.4 trillion parameters with about 95 billion active per token. In August the Vals Index [ranked Qwen3.8-Max](https://rits.shanghai.nyu.edu/ai/qwen3-8-2-4t-a95b-alibaba-open-weights-its-max-tier-flagship/) second among open-weight models. Its 4-bit file is 1.31 TB, about 70 times the size of Qwen3.8 27B. No single Mac can hold that today.

## How did the M3 Ultra change what a Mac could run?

March 2025. Apple shipped the M3 Ultra Mac Studio with 512 GB of unified memory, "the most ever in a personal computer," and [said it could run](https://www.apple.com/newsroom/2025/03/apple-unveils-new-mac-studio-the-most-powerful-mac-ever/) "LLMs with over 600 billion parameters entirely in memory." Bandwidth barely moved, at 819 GB/s. What moved was the pitch. Apple was now selling a desktop on the size of the model it could hold.

The M5 Ultra followed in August 2026 at 1.2 TB/s, a 50% jump. Apple calls that Mac Studio "the ultimate desktop for on-device AI" and [describes it](https://www.apple.com/newsroom/2026/08/apple-introduces-new-mac-studio-with-m5-max-and-m5-ultra/) as "putting frontier-class AI models right on a user's desk."

## Why is the Mac Studio the machine to watch?

Apple [discontinued the Mac Pro](https://9to5mac.com/2026/03/26/apple-discontinues-the-mac-pro/) in March 2026 and said it has no plans for future Mac Pro hardware. That leaves the Studio on top, with no tower above it to protect. The last Mac Pro stopped at 192 GB. The Studio already carries 512 GB.

Bloomberg's Mark Gurman [reports](https://www.tomshardware.com/tech-industry/semiconductors/apples-rumored-m7-ultra-targets-1-5tb-of-memory-and-blackwell-class-ai) that the M7 Ultra is being designed for up to 1.5 TB of unified memory. That's the same ceiling as the [2019 Intel Mac Pro](https://support.apple.com/en-us/118461), which reached it on six channels of DDR4 at about 141 GB/s. The M7 Ultra would move 14 to 17 times that, and share it with the GPU. He also [reports](https://www.macrumors.com/2026/06/29/mac-studio-m7-ultra-2028-better-cooling/) new inner architecture and a better heat sink for the 2028 Studio. Mac Pro territory, in a box that sits on a desk.

The schedule points the same way. Apple canceled the M6 Pro and M6 Max, the first time an M generation has gone without them, and moved those tiers to the M7, as Tom's Hardware [put it](https://www.tomshardware.com/tech-industry/apple-will-skip-its-high-end-m6-mac-chips-and-fast-track-an-ai-focused-m7-generation-for-2027), "as Apple chases memory bandwidth for on-device AI." The August launch confirmed the shape, with a base M6 sold beside an M5 Pro in the same Mac mini.

## Why is LPDDR6 the next step?

Bandwidth is bus width times memory speed. For the Ultra, Apple has only ever moved speed. It's been 1,024 bits since the M1 Ultra, running 6,400 MT/s then and 9,600 MT/s on the M5 Ultra.

That road is running out. The [M6's 170 GB/s](https://www.macrumors.com/2026/08/25/apple-reveals-m6/) on a 128-bit bus works out to 10,667 MT/s, and [JEDEC's LPDDR6 standard](https://www.jedec.org/node/9555) starts at that same speed and [runs to 14,400](https://www.notebookcheck.net/JEDEC-releases-LPDDR6-standard-data-rates-reach-14-400-MT-s.1055771.0.html). It also changes the channel. LPDDR5X channels are 16 bits wide. LPDDR6 channels are 24, split into two 12-bit subchannels.

Nobody has reported which memory the M7 uses, so LPDDR6 is our inference. The reported numbers lean that way. Bloomberg puts the base M7 at about 240 GB/s, and today's 128-bit base bus can't get there on either standard. It reaches 171 GB/s at 10,667 MT/s and 230 GB/s at LPDDR6's top speed. The base chip needs a wider bus regardless.

## What does LPDDR6 mean for bus width?

Keep the channel count and the bus grows by half. The M5 Ultra's 64 channels of 16 bits become 64 channels of 24 bits, or 1,536 bits in total, without adding a single channel.

Holding 1,024 bits would mean dropping to about 43 channels, and we don't expect that. The 1.5 TB target would then need about 4.5 times the memory per channel instead of 3 times. The Ultra would also gain about a third in usable bandwidth while the base M7 gains 56%. Canceling a generation to give the flagship a smaller step than the cheapest chip doesn't add up.

Apple has narrowed a bus before. The M3 Pro fell to 150 GB/s from the M2 Pro's 200. It has never done that to an Ultra, and the M3 Pro wasn't part of a generation built around memory bandwidth.

## How much bandwidth, conservative and maxed out?

Width alone gets you the conservative number. The Ultra has run 8 times its base chip whenever both used the same memory speed (M2, M3 and M5), so a 240 GB/s base M7 gives 1.92 TB/s.

Maxed out is LPDDR6's top speed on all 64 channels. JEDEC's figure at 14,400 MT/s is 38.4 GB/s per channel, so 64 of them deliver 2.46 TB/s. Multiplying bus by speed gives 2.77 TB/s, but we use JEDEC's number.

| Scenario | Bus | Memory speed | Bandwidth |
| --- | --- | --- | --- |
| Apple keeps today's bus width | 1,024-bit | 14,400 MT/s | 1.64 TB/s (1.84 by bus times speed) |
| Conservative | 1,536-bit | Base M7's speed | 1.92 TB/s |
| Middle, an M4-sized speed step | 1,536-bit | 14% above base | 2.18 TB/s |
| Maxed out | 1,536-bit | 14,400 MT/s | 2.46 TB/s (2.77 by bus times speed) |

Passing 2.4 TB/s takes memory 25% faster than the base M7's, and Apple's record is mixed. The M2, M3 and M5 Ultras matched their base chips. The M4 Max ran 14% faster than the base M4. The M1 Ultra ran 47% faster, because the upper tiers arrived later on a newer memory type. That's the closest match for a base M7 in early 2027 and an Ultra in 2028, so we lean toward the upper half of the range.

Two ways of being wrong land in the same place. The report that gave us 240 GB/s also put the base M6 near 200, and it shipped at up to 170. The same 15% miss makes the Ultra 1.63 TB/s. Staying on a 1,024-bit bus makes it 1.64 TB/s. Even that is a third above the M5 Ultra.

Our [December 2025 math](/blog/why-piperkit-exists) put a 1,024-bit LPDDR6 Ultra near 1.8 TB/s and called that a floor. Wider channels are why we now expect more.

## How does that compare with Nvidia?

On memory bandwidth, the desktop Blackwell flagship is in range. An [RTX 5090](https://www.nvidia.com/en-us/geforce/graphics-cards/50-series/rtx-5090/) has 1.79 TB/s and 32 GB. A conservative M7 Ultra has 7% more bandwidth and 48 times the memory, and a maxed-out one has 37% more bandwidth.

A data-center B200 is another class. At [8 TB/s per GPU](https://www.nvidia.com/en-us/data-center/dgx-b200/) it stays 3.3 to 4.2 times ahead, and Nvidia keeps the lead on raw compute. The reporting on the M7 Ultra is careful here too, describing AI performance "closer to" Blackwell-class accelerators, not level with them.

## Will 2nm mean more GPU cores?

Yes, and it's the safest part of this forecast. Apple [says the M6's 2nm process](https://www.macrumors.com/2026/08/25/apple-reveals-m6/) packs greater transistor density into a smaller die. The chip went from 10 GPU cores to 12, the first base-tier increase since the M2, and Apple claims nearly 30% more peak GPU compute for AI than the M5. The Max held 40 cores across the M3, M4 and M5, all 3nm parts. With the M6 on 2nm and the M8 [reported](https://www.tomshardware.com/tech-industry/semiconductors/apples-rumored-m7-ultra-targets-1-5tb-of-memory-and-blackwell-class-ai) at 1.4nm, the M7 Pro, Max and Ultra should be the first of their tiers on 2nm.

The same 20% step takes the Ultra from 80 cores to 96. We project up to 128, because the reporting describes an M7 built for on-device AI and GPU-heavy software, and that's where we'd expect Apple to spend the density.

Cores cover the part of local AI that bandwidth doesn't. Prompt processing is limited by compute. Since the M5, every GPU core carries a Neural Accelerator, and Apple claims the M5 Ultra has 4.3 times the peak AI compute of the M3 Ultra.

## What are the final M7 Ultra specs, with memory maxed out?

| Spec | M5 Ultra (shipping) | M7 Ultra, conservative | M7 Ultra, maxed out |
| --- | --- | --- | --- |
| Arrives (reported) | September 2026 | 2028 | 2028 |
| Process (our inference) | 3nm | 2nm | 2nm |
| Unified memory (reported target) | 512 GB | 1.5 TB | 1.5 TB |
| Memory type (our inference) | LPDDR5X | LPDDR6 | LPDDR6 |
| Bus width (our math) | 1,024-bit | 1,536-bit | 1,536-bit |
| Memory bandwidth (our math) | 1.2 TB/s | 1.92 TB/s | 2.46 TB/s |
| GPU cores (our projection) | 80 | 96 | 128 |
| Largest Qwen3.8 2.4T build that fits | 1-bit (397 GB) | 4-bit (1.31 TB) | 4-bit (1.31 TB) |
| Rough speed ceiling on the 4-bit build | n/a | 37 tokens/s | 47 tokens/s |

Our [Model Fit](/fit) estimator leaves about 1.45 TB of a 1.5 TB Mac available to a model, so the 1.31 TB file fits with roughly 140 GB to spare. The speed line divides bandwidth by the 52 GB read per token, so it's arithmetic, not a measurement. Plain decoding usually falls short of that ceiling and speculative decoding can beat it. For scale, [NVIDIA reports](https://developer.nvidia.com/blog/serve-qwen3-8-2-4t-a95b-a-2-4t-parameter-model-with-configurable-reasoning-on-nvidia-gb300-nvl72/) over 350 tokens per second per user for the same model on a GB300 NVL72 rack.

The 1.5 TB configuration is the part most likely to change. Gurman says it depends on the memory market. Apple [pulled the M3 Ultra's 512 GB tier](https://www.tomshardware.com/tech-industry/apple-will-skip-its-high-end-m6-mac-chips-and-fast-track-an-ai-focused-m7-generation-for-2027) during this shortage, and the M5 Ultra shipped at 512 GB after 768 GB was reported in testing. We aren't projecting a price for the same reason.

## Is this the machine that beats the cloud?

We think so, for most of the work people actually send there. The Intelligence per Watt study already had one local model matching a frontier model on 71.3% of real queries in 2025, measured on an M4 Max. Cloud keeps the frontier and the heaviest jobs. Local takes the volume, and the volume is the market.

A 2.4-trillion-parameter open flagship on one desk, with no meter, no rate limit and no prompt leaving the building, is the point where running it yourself stops being the enthusiast's answer. That's a bet on a reported roadmap, and we'll update these numbers as Apple ships.

[Model Fit](/fit) shows what your Mac can hold today, and [ToolPiper](/download) runs it.

_For the argument behind this, read [Why PiperKit Exists](/blog/why-piperkit-exists)._

## FAQ

### When will the M7 Ultra Mac Studio come out?

Bloomberg reports 2028, after a base M7 in the first half of 2027 and the M7 Pro and Max at the end of 2027. Apple hasn't announced any of them.

### How much memory will the M7 Ultra have?

Bloomberg reports a design target of up to 1.5 TB of unified memory, three times the M5 Ultra's 512 GB. Whether that configuration ships depends on the memory market.

### What will the M7 Ultra's memory bandwidth be?

We project 1.92 TB/s conservatively and 2.46 TB/s maxed out, against 1.2 TB/s on the M5 Ultra. That assumes LPDDR6 on a 1,536-bit bus. Staying on a 1,024-bit bus would mean about 1.64 TB/s.

### Will the M7 Ultra use LPDDR6?

It hasn't been reported. We infer it because a 240 GB/s base M7 can't be built on today's 128-bit bus at any LPDDR5X or LPDDR6 speed, and LPDDR6's 24-bit channels widen the bus without adding channels.

### Will the M7 Ultra match Nvidia's Blackwell?

On memory bandwidth it should pass the RTX 5090, the desktop Blackwell flagship, and carry 48 times its memory. It won't reach a data-center B200's 8 TB/s, and Nvidia keeps the lead on raw compute.